Work function adjustment in high-k gate stacks for devices of different threshold voltage
US8357604B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2010 |
| Grant date | Jan 22, 2013 |
| Priority date | — |
| Expiry date | Apr 8, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In sophisticated semiconductor devices, different threshold voltage levels for transistors may be set in an early manufacturing stage, i.e., prior to patterning the gate electrode structures, by using multiple diffusion processes and/or gate dielectric materials. In this manner, substantially the same gate layer stacks, i.e., the same electrode materials and the same dielectric cap materials, may be used, thereby providing superior patterning uniformity when applying sophisticated etch strategies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.