Memory device and method
US8358557B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2011 |
| Grant date | Jan 22, 2013 |
| Priority date | — |
| Expiry date | Sep 26, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of accessing a memory device multiple times in a same time period can include, in a first sequence of accesses, starting an access operation to one of a plurality of banks in synchronism with a first part of a first clock cycle and starting an access operation to another of the plurality of banks in synchronism with a second part of the first clock cycle, each bank having separate access circuits; and the time between consecutive accesses is faster than an access speed for back-to-back accesses to a same one of the banks; wherein during the access operations, storage locations of each bank are accessed in a same time period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.