High performance low power bulk FET device and method of manufacture
US8361872B2 · kind B2 · utility
7Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 7, 2010 |
| Grant date | Jan 29, 2013 |
| Priority date | — |
| Expiry date | Oct 9, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device includes: forming a channel of a field effect transistor (FET) in a substrate; forming a heavily doped region in the substrate; and forming recesses adjacent the channel and the heavily doped region. The method also includes: forming an undoped or lightly doped intermediate layer in the recesses on exposed portions of the channel and the heavily doped region; and forming source and drain regions on the intermediate layer such that the source and drain regions are spaced apart from the heavily doped region by the intermediate layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.