Fine pitch grid array type semiconductor device
US8362614B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2005 |
| Grant date | Jan 29, 2013 |
| Priority date | — |
| Expiry date | May 25, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a semiconductor chip in which a plurality of semiconductor components and a plurality of pads are arranged, a plurality of external connection contacts arranged in grids, and a plurality of wires for electrically connecting the pads and the external connection contacts. The pads include a plurality of pad groups including a pair of electrode pads connected to the plurality of semiconductor components in common and a plurality of signal pads respectively connected to the semiconductor components connected to the electrode pads. In each pad group, each signal pad is arranged adjacently to one of the electrode pads; and each wire extending from each signal pad is extended along a wire extended from the electrode pad adjacent to each signal pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.