Integrated circuit stack
US8363402B2 · kind B2 · utility
32Cited by
34References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2008 |
| Grant date | Jan 29, 2013 |
| Priority date | — |
| Expiry date | Dec 23, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06589
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to an integrated circuit stack (1) comprising a plurality of integrated circuit layers (2) and at least one cooling layer (3) arranged in a space between two circuit layers (2). The integrated circuit stack (1) is cooled using a cooling fluid (10) pumped through the cooling layer (3). The invention further relates to a method for optimizing a configuration of such an integrated circuit stack (1).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.