Method of generating a leadframe IC package model, a leadframe modeler and an IC design system
US8370777B2 · kind B2 · utility
1Cited by
3References
16Claims
0Family size
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Key dates
| Filing date | Jun 16, 2009 |
| Grant date | Feb 5, 2013 |
| Priority date | — |
| Expiry date | Sep 19, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of generating a model of a leadframe IC package, a leadframe modeler and an IC design system are disclosed. In one embodiment the method includes: (1) adding connectivity information to a geometric representation of a leadframe, wherein the connectivity information represents electrical connections between the IC die and leads of the leadframe and (2) formatting the leads to represent BGA point of contacts for the IC die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.