Patent · US Active

Method for manufacturing silicon wafer and silicon wafer manufactured by this method

US8377202B2 · kind B2 · utility

1Cited by
7References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMay 17, 2007
Grant dateFeb 19, 2013
Priority date
Expiry dateJun 7, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/76229
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for manufacturing a silicon wafer having a defect-free region in a surface layer, in which at least only a surface layer region to a predetermined depth from a front surface of a silicon wafer to be processed is subjected to heat treatment at a temperature of not less than 1100 degrees C. for not less than 0.01 msec to not more than 1 sec, to thereby make the surface layer defect-free. As a result of this, there is provided a method for manufacturing a silicon wafer, in which a DZ layer without generation of crystal defects from the front surface to a constant depth can be uniformly formed, and oxide precipitates having a steep profile inside the wafer can be secured and controlled with a high degree of accuracy.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.