Nonvolatile memory devices having dummy cell and bias methods thereof
US8379456B2 · kind B2 · utility
7Cited by
7References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2010 |
| Grant date | Feb 19, 2013 |
| Priority date | — |
| Expiry date | Apr 26, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are nonvolatile memory devices and methods of operating thereof. The nonvolatile memory devices include: dummy cells connected to a dummy bit line; and a dummy bit line bias circuit providing a dummy bit line voltage to the dummy bit line during a program operation, wherein, due to the dummy bit line voltage, at least one of the dummy cells is programmed with a threshold voltage lower than the top programmed state and higher than an erased state during the program operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.