Dissection splitting with optical proximity correction and mask rule check enforcement
US8381153B2 · kind B2 · utility
19Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2010 |
| Grant date | Feb 19, 2013 |
| Priority date | — |
| Expiry date | Sep 28, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides one embodiment of an integrated circuit (IC) design method. The method includes receiving an IC design layout having a plurality of main features; applying a main feature dissection to the main features of the IC design layout and generating sub-portions of the main features; performing an optical proximity correction (OPC) to the main features; performing a mask rule check (MRC) to a main feature of the IC design layout; and modifying one of the sub-portions of the main feature if the main feature fails the MRC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.