Method for producing field effect transistors with a back gate and semiconductor device
US8383464B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2010 |
| Grant date | Feb 26, 2013 |
| Priority date | — |
| Expiry date | Jan 7, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The method for producing a field effect transistor on a substrate comprising a support layer, a sacrificial layer and a semi-conducting layer comprises forming an active area in the semi-conducting layer. The active area is delineated by a closed peripheral insulation pattern and comprises an additional pattern made from insulating material. The method also comprises etching the insulating material of the additional pattern to access the sacrificial layer, etching the sacrificial layer resulting in formation of a first cavity, forming a dielectric layer on a top wall of the first cavity, and depositing an electrically conducting layer in the first cavity. The closed peripheral insulation pattern is formed through the semi-conducting layer and the sacrificial layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.