Methods for forming semiconductor structures using selectively-formed sidewall spacers
US8383503B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 5, 2009 |
| Grant date | Feb 26, 2013 |
| Priority date | — |
| Expiry date | Sep 3, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for forming semiconductor structures using selectively-formed sidewall spacers are provided. One method comprises forming a first structure and a second structure. The second structure has a height that is greater than the first structure's height. A first sidewall spacer-forming material is deposited overlying the first structure and the second structure. A second sidewall spacer-forming material is deposited overlying the first sidewall spacer-forming material. A composite spacer is formed about the second structure, the composite spacer comprising the first sidewall spacer-forming material and the second sidewall spacer-forming material. The second sidewall spacer-forming material is removed from the first structure and the first sidewall spacer-forming material is removed from the first structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.