Circuit board having pad and chip package structure thereof
US8389869B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 4, 2009 |
| Grant date | Mar 5, 2013 |
| Priority date | — |
| Expiry date | Aug 13, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A circuit board including a substrate, a conductive pattern and a solder mask layer is provided. The conductive pattern includes a pad, a tail trace and a signal trace. The tail trace connects with the edge of the pad and the signal trace connects with the edge of the pad. An angle between a portion of the signal trace neighboring the pad and the tail trace is larger than 0 degree and smaller than 180 degree. The solder mask layer is disposed on the substrate and covers a portion of conductive pattern. The solder mask layer has an opening exposing the whole pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.