Managing memory refreshes
US8397100B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2010 |
| Grant date | Mar 12, 2013 |
| Priority date | — |
| Expiry date | Mar 7, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/40611
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods to manage memory refreshes at a memory controller are disclosed. A method includes determining, at a memory controller device, that a number of transmission errors between a memory controller port and a memory redrive device exceeds an error threshold. The method may include initiating a first link retraining process between the memory controller port and the memory redrive device. The method may further include placing one or more dynamic random access memory modules associated with the memory redrive device in a self-refresh mode. The method may also include removing the one or more dynamic random access memory modules from the self-refresh mode after the link retraining process has completed. The method may further include enabling overlapping refreshes of the one or more dynamic random access memory modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.