Method for fabricating semiconductor device with buried gate
US8404543B2 · kind B2 · utility
7Cited by
1References
26Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 23, 2009 |
| Grant date | Mar 26, 2013 |
| Priority date | — |
| Expiry date | Jul 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device with a buried gate includes: etching a substrate to form a plurality of trenches; forming a plurality of buried gates that fill lower portions of the trenches; forming a plurality of sealing layers that gap-fill upper portions of the trenches and have protrusions higher than a top surface of the substrate; forming an inter-layer insulation layer over the whole surface of the substrate including the sealing layers; and etching the inter-layer insulation layer to form a contact hole that is aligned with a space between the protrusions of the sealing layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.