Patent · US Active

CMOSFET device with controlled threshold voltage characteristics and method of fabricating the same

US8410541B2 · kind B2 · utility

3Cited by
1References
15Claims
0Family size

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Key dates

Filing dateJun 24, 2010
Grant dateApr 2, 2013
Priority date
Expiry dateJun 24, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/667

Abstract

There is provided a CMOSFET device with threshold voltage controlled by means of interface dipoles and a method of fabricating the same. A cap layer, for example a very thin layer of poly-silicon, amorphous silicon, or SiO2, is interposed inside high-k gate dielectric layers of the CMOSFET device, and the threshold voltage is adjusted by means of the interface dipoles formed by the cap layer inside the high-k gate dielectric layers. According to the present invention, it is possible to effectively optimize the threshold voltage of the CMOSFET device without significantly increasing EOT thereof.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.