Semiconductor device and method for manufacturing the same

US8415222B2 · kind B2 · utility

Assignee

• INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES · CN

Inventors

• Wenwu Wang · Beijing, CN
• Xueli Ma · Shanghai, CN
• Wen Ou · Taichung, TW
• Dapeng Chen · Beijing, CN

Key dates

• Filing date: Sep 28, 2010
• Grant date: Apr 9, 2013
• Expiry date: Sep 28, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/822

Abstract

The present invention provides a semiconductor device and a method for manufacturing the same. The method includes: providing a substrate; forming a gate stack on the substrate; forming an inter layer dielectric (ILD) to cover the device; etching the ILD at both sides of the gate stack and the substrate below the ILD, so as to form a groove of source and drain regions respectively; depositing a metal diffusion barrier layer in the groove; and filling the groove with a metal to form the source and drain regions. The semiconductor device includes: a substrate; a gate stack on the substrate; an inter layer dielectric (ILD) covering the device; a groove of source and drain regions formed in the ILD at both sides of the gate stack and the substrate below the ILD; and a metal diffusion barrier layer and a metal filler formed in the groove. According to the present invention, the S/D parasitic resistance in the MOS device is reduced, the S/D stress on the channel is increased, the process temperature is lowered, and the process compatibility between the high k gate dielectric layer and the metal gate is improved.