Method of forming silicide contacts of different shapes selectively on regions of a semiconductor device
US8415250B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2011 |
| Grant date | Apr 9, 2013 |
| Priority date | — |
| Expiry date | Apr 29, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A structure and method for fabricating silicide contacts for semiconductor devices is provided. Specifically, the structure and method involves utilizing chemical vapor deposition (CVD) and annealing to form silicide contacts of different shapes, selectively on regions of a semiconductor field effect transistor (FET), such as on source and drain regions. The shape of silicide contacts is a critical factor that can be manipulated to reduce contact resistance. Thus, the structure and method provide silicide contacts of different shapes with low contact resistance, wherein the silicide contacts also mitigate leakage current to enhance the utility and performance of FETs in low power applications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.