Patent · US Active

Process for manufacture of thin wafer

US8420505B2 · kind B2 · utility

0Cited by
26References
18Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMar 26, 2007
Grant dateApr 16, 2013
Priority date
Expiry dateOct 10, 2029

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10T428/266
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A process to thin semiconductor wafers to less than 50 microns employs a dissolvable photoresist or polyimide or other glue material to hold a thick carrier plate such as a perforated glass to the top surface of a thick processed wafer and to grind or otherwise remove the bulk of the wafer from its rear surface, leaving only the preprocessed top surface, which may include semiconductor device diffusions and electrodes. A thick metal such as copper or a more brittle copper alloy is then conductively secured to the ground back surface and the glue is dissolved and the carrier plate is removed. The wafer is then cleaned and diced into plural devices such as MOSFETs; integrated circuits and the like.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.