Metallization system of a semiconductor device comprising rounded interconnects formed by hard mask rounding
US8420533B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2010 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | Aug 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In sophisticated metallization systems, vertical contacts and metal lines may be formed on the basis of a dual inlaid strategy, wherein an edge rounding or corner rounding may be applied to the trench hard mask prior to forming the via openings on the basis of a self-aligned via trench concept. Consequently, self-aligned interconnect structures may be obtained, while at the same time providing superior fill conditions during the deposition of barrier materials and conductive fill materials.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.