Apparatus, system, and method for tunneling MOSFETs using self-aligned heterostructure source and isolated drain
US8421165B2 · kind B2 · utility
5Cited by
3References
18Claims
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Key dates
| Filing date | May 11, 2010 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | Apr 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/371
Abstract
Apparatuses, systems, and methods for tunneling MOSFETs (TFETs) using a self-aligned heterostructure source and isolated drain. TFETs that have an abrupt junction between source and drain regions have an increased probability of carrier direct tunneling (e.g., electrons and holes). The increased probability allows a higher achievable on current in TFETs having the abrupt junction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.