Schottky barrier diode with perimeter capacitance well junction
US8421181B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2010 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | May 24, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/126
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A Schottky barrier diode comprises a first-type substrate, a second-type well isolation region on the first-type substrate, and a first-type well region on the second-type well isolation region. With embodiments herein a feature referred to as a perimeter capacitance well junction ring is on the second-type well isolation region. A second-type well region is on the second-type well isolation region. The perimeter capacitance well junction ring is positioned between and separates the first-type well region and the second-type well region. A second-type contact region is on the second-type well region, and a first-type contact region contacts the inner portion of the first-type well region. The inner portion of the first-type well region is positioned within the center of the first-type contact region. Additionally, a first ohmic metallic layer is on the first-type contact region and a second ohmic metallic layer is on the first-type well region. The first ohmic metallic layer contacts the second ohmic metallic layer at a junction that makes up the Schottky barrier of the Schottky barrier diode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.