Integrated circuit packaging system with underfill and methods of manufacture thereof
US8421201B2 · kind B2 · utility
9Cited by
11References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2009 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | Jan 12, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of an integrated circuit packaging system includes: providing a device having a conductor with ends exposed on opposite sides of the device; forming a first surface depression on the device around the conductor; connecting a first component over the conductor and surrounded by the first surface depression; and applying a first underfill between the first component and the device, the first underfill substantially filled within a perimeter of the first surface depression.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.