Thermal power plane for integrated circuits

US8427833B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Harry Barowski · Balingen, DE
• Thomas J. Brunschwiler · Thalwil, CH
• Hubert Harrer · Böblingen, DE
• Andreas Huber · Holzgerlingen, DE
• Bruno Michel · Thalwil, CH
• Tim Niggemeier · Laatzen, DE
• Stephan Paredes · Thalwil, CH
• Jochen Supper · Herrenberg, DE

Key dates

• Filing date: Oct 28, 2010
• Grant date: Apr 23, 2013
• Expiry date: Aug 11, 2031

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10T29/49155
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A mechanism is provided for a thermal power plane that delivers power and constitutes minimal thermal resistance. The mechanism comprises a processor layer coupled, via a first set of coupling devices, to a signaling and input/output (I/O) layer and a power delivery layer coupled, via a second set of coupling devices, to the processor layer. In the mechanism, the power delivery layer is dedicated to only delivering power and does not provide data communication signals to the elements of the mechanism. In the mechanism, the power delivery layer comprises a plurality of conductors, a plurality of insulating materials, one or more ground planes, and a plurality of through laminate vias. In the mechanism, the signaling and input/output (I/O) layer is dedicated to only transmitting the data communication signals to and receiving the data communications signals from the processor layer and does not provide power to the elements of the processor layer.