Non-volatile memory
US8436411B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2009 |
| Grant date | May 7, 2013 |
| Priority date | — |
| Expiry date | Dec 11, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
Abstract
A non-volatile memory including a substrate, two first conductive layers, a second conductive layer, a first dielectric layer, a second dielectric layer and two heavily doped regions is provided. The substrate has at least two isolation structures therein and an active region between the isolation structures. The first conductive layers are respectively disposed on the isolation structures. The second conductive layer is disposed on the substrate and covering a portion of the active region and a portion of each first conductive layer. The first dielectric layer is disposed between each first conductive layer and the second conductive layer. The second dielectric layer is disposed between the second conductive layer in the active region and the substrate. The heavily doped regions are disposed in the substrate beside the second conductive layer in the active region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.