Tunneling field-effect transistor with direct tunneling for enhanced tunneling current
US8436422B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2010 |
| Grant date | May 7, 2013 |
| Priority date | — |
| Expiry date | Mar 29, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/60
Abstract
Horizontal and vertical tunneling field-effect transistors (TFETs) having an abrupt junction between source and drain regions increases probability of direct tunneling of carriers (e.g., electrons and holes). The increased probability allows a higher achievable on current in TFETs having the abrupt junction. The abrupt junction may be formed by placement of a dielectric layer or a dielectric layer and a semiconductor layer in a current path between the source and drain regions. The dielectric layer may be a low permittivity oxide such as silicon oxide, lanthanum oxide, zirconium oxide, or aluminum oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.