Multi-layer via-less thin film resistor
US8436426B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2010 |
| Grant date | May 7, 2013 |
| Priority date | — |
| Expiry date | Aug 24, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/474
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure is directed to a thin film resistor having a first resistor layer having a first temperature coefficient of resistance and a second resistor layer on the first resistor layer, the second resistor layer having a second temperature coefficient of resistance different from the first temperature coefficient of resistance. The first temperature coefficient of resistance may be positive while the second temperature coefficient of resistance is negative. The first resistor layer may have a thickness in the range of 50 and 150 angstroms and the second resistor layer may have a thickness in the range of 20 and 50 angstroms.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.