Method for manufacturing a vertical nonvolatile semiconductor memory device including forming floating gates within the recesses created on the interlayer insulating films
US8440528B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2009 |
| Grant date | May 14, 2013 |
| Priority date | — |
| Expiry date | Mar 5, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6891
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor memory device includes: forming a stacked body by alternately stacking a plurality of interlayer insulating films and a plurality of control gate electrodes; forming a through-hole extending in a stacking direction in the stacked body; etching a portion of the interlayer insulating film facing the through-hole via the through-hole to remove the portion; forming a removed portion; forming a first insulating film on inner faces of the through-hole and the portion in which the interlayer insulating films are removed; forming a floating gate electrode in the portion in which the interlayer insulating films are removed; forming a second insulating film so as to cover a portion of the floating gate electrode facing the through-hole; and burying a semiconductor pillar in the through-hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.