Patent · US Expired

Heterojunction tunneling field effect transistors, and methods for fabricating the same

US8441000B2 · kind B2 · utility

9Cited by
0References
5Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 1, 2006
Grant dateMay 14, 2013
Priority date
Expiry dateMar 3, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/822

Abstract

The present invention relates to a heterojunction tunneling effect transistor (TFET), which comprises spaced apart source and drain regions with a channel region located therebetween and a gate stack located over the channel region. The drain region comprises a first semiconductor material and is doped with a first dopant species of a first conductivity type. The source region comprises a second, different semiconductor material and is doped with a second dopant species of a second, different conductivity type. The gate stack comprises at least a gate dielectric and a gate conductor. When the heterojunction TFET is an n-channel TFET, the drain region comprises n-doped silicon, while the source region comprises p-doped silicon germanium. When the heterojunction TFET is a p-channel TPET, the drain region comprises p-doped silicon, while the source region comprises n-doped SiC.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.