Semiconductor integrated circuit having stacked semiconductor chips and vias therebetween
US8441831B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2010 |
| Grant date | May 14, 2013 |
| Priority date | — |
| Expiry date | Feb 17, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes a first semiconductor chip including a first output circuit which is enabled in a first operation mode and outputs a first output signal and a second output circuit which is enabled in a second operation mode and outputs a second output signal; a second semiconductor chip including a first input circuit which is enabled in the first operation mode and receives the first output signal and a second input circuit which is enabled in the second operation mode and receives the second output signal; and a common through chip via arranged to vertically penetrate through the semiconductor chip, be coupled with the first and second output circuits in one end and coupled with the first and second input circuits in the other end, and interface transfer of the first and second output signals which are enabled in different operation modes, including the first and second operation modes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.