Substrate processing apparatus
US8443513B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2010 |
| Grant date | May 21, 2013 |
| Priority date | — |
| Expiry date | Sep 8, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/534
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a substrate processing apparatus which can achieve an improvement in throughput and suppress the reduction in the operation rate of the entire apparatus even when a problem occurs. In the disclosed apparatus, at the rear end of a substrate loading block including a loading/unloading arm for transferring a wafer to a carrier, a first, a second, and a third processing blocks are disposed in that order. In the substrate loading block, transfer stages are provide for transferring a wafer from the loading/unloading arm to the first processing block, for transferring a wafer to the second processing block, and for transferring a wafer to the third processing block so that the wafer on the transfer stage is directly carried to the second processing block by a first direct carrying mechanism, and to the third processing block by a second direct carrying mechanism.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.