Phase interpolator and a delay circuit for the phase interpolator
US8446198B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 2010 |
| Grant date | May 21, 2013 |
| Priority date | — |
| Expiry date | Jan 14, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H11/265
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Phase interpolator and a delay circuit for the phase interpolator. The phase interpolator includes a variable delay circuit to rotate phase of an input clock to generate a phase rotated signal. The phase interpolator also includes a delay locked loop coupled to the variable delay circuit to generate a plurality of phase shifted outputs. The delay locked loop includes a plurality of delay elements. Each delay element includes a multiplexer and a delay cell coupled to the multiplexer. The multiplexer is configurable using a first control signal to output one of the phase rotated signal and a phase shifted output of the plurality of phase shifted outputs. The delay cell delays one of the phase rotated signal and the phase shifted output to generate another phase shifted output of the plurality of phase shifted outputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.