Vector evaluation of assertions
US8448109B1 · kind B1 · utility
1Cited by
7References
21Claims
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Key dates
| Filing date | Jan 31, 2012 |
| Grant date | May 21, 2013 |
| Priority date | — |
| Expiry date | Jan 31, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and techniques for evaluating assertions during circuit verification are described. During operation, m semantically equivalent assertions can be identified, wherein each of the m semantically equivalent assertions is evaluated using n logical expressions. Next, a set of vectors based on the m semantically equivalent assertions can be determined, wherein each vector element corresponds to a logical expression that is used for evaluating one of the m semantically equivalent assertions. The m semantically equivalent assertions can then be evaluated, in parallel, using the set of vectors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.