Patent · US Active

Method and core materials for semiconductor packaging

US8456016B2 · kind B2 · utility

1Cited by
3References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 23, 2010
Grant dateJun 4, 2013
Priority date
Expiry dateAug 23, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH05K2201/10674
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor package comprises a semiconductor substrate that may comprise a core. The core may comprise one or more materials selected from a group comprising ceramics and glass dielectrics. The package further comprises a set of one or more inner conductive elements that is provided on the core, a set of one or more outer conductive elements that is provided on an outer side of the substrate, and a semiconductor die to couple to the substrate via one or more of the outer conductive elements. Example materials for the core may comprise one or more from alumina, zirconia, carbides, nitrides, fused silica, quartz, sapphire, and Pyrex. A laser may be used to drill one or more plated through holes to couple an inner conductive element to an outer conductive element. A dielectric layer may be formed in the substrate to insulate an outer conductive element from the core or an inner conductive element.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.