Semiconductor devices with different dielectric thicknesses
US8460996B2 · kind B2 · utility
7Cited by
1References
15Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 31, 2007 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Mar 17, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
An integrated circuit with devices having dielectric layers with different thicknesses. The dielectric layers include a high-k dielectric and some of the dielectric layers include an oxide layer that is formed from an oxidation process. Each device includes a layer including germanium or carbon located underneath the electrode stack of the device. A silicon cap layers is located over the layer including germanium or carbon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.