Semiconductor component and method of manufacture
US8461670B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2010 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | May 20, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component is configured to permit the determination of circuit parameters. A high side FET has a gate terminal coupled to an output terminal of a high side gate drive circuit, a drain terminal coupled for receiving an input voltage, and a source terminal coupled to the drain terminal of a low side FET. The gate terminal of the low side FET is coupled to the output terminal of low side drive circuit and the source terminal of the low side FET is coupled for receiving a source of operating potential. The high side gate drive circuit has a bias terminal coupled for receiving a floating potential where the bias terminal is electrically isolated or decoupled from the commonly connected source and drain terminals of the high side FET and the low side FET, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.