Method of fabricating semiconductor device having buried wiring
US8466052B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2010 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Nov 14, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/488
Abstract
A method of fabricating a semiconductor device can include forming a trench in a semiconductor substrate, forming a first conductive layer on a bottom surface and side surfaces of the trench, and selectively forming a second conductive layer on the first conductive layer to be buried in the trench. The second conductive layer may be formed selectively on the first conductive layer by using an electroless plating method or using a metal organic chemical vapor deposition (MOCVD) or an atomic layer deposition (ALD) method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.