Semiconductor package of a flipped MOSFET and its manufacturing method
US8481368B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2011 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | Oct 20, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a semiconductor package of a flip chip and a method for making the semiconductor package. The semiconductor chip comprises a metal-oxide-semiconductor field effect transistor. On a die paddle including a first base, a second base and a third base, half-etching or punching is performed on the top surfaces of the first base and the second base to obtain plurality of grooves that divide the top surface of the first base into a plurality of areas comprising multiple first connecting areas, and divide the top surface of the second base into a plurality of areas comprising at least a second connecting area. The semiconductor chip is connected to the die paddle at the first connecting areas and the second connecting area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.