Patent · US Active

Method of making semiconductor package with improved standoff

US8481369B2 · kind B2 · utility

0Cited by

5References

10Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Junhua Luo · Tianjin, CN
Xingshou Pang · Tianjin, CN
Jinzhong Yao · Tianjin, CN

Key dates

Filing date	Jan 11, 2011
Grant date	Jul 9, 2013
Priority date	—
Expiry date	Jan 17, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/181
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A no-lead type semiconductor package is formed by attaching a die to a top surface of a flag of a lead frame and then taping a bottom surface of the flag and leads of the lead frame. Die bonding pads are connected to the leads with wires and then the assembly is put in a mold chase and encapsulated with a plastic material. The mold chase has protrusions between the flag and the leads of a lead frame, and between the leads themselves, which causes indentations to be formed between the leads and between the flag and the leads. The method is particularly useful for making quad flat no lead (QFN) devices and power-QFN type devices.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.