Patent · US Active

Process for manufacturing stress-providing structure and semiconductor device with such stress-providing structure

US8481391B2 · kind B2 · utility

0Cited by
79References
11Claims
0Family size

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Key dates

Filing dateMay 18, 2011
Grant dateJul 9, 2013
Priority date
Expiry dateSep 27, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/021
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A process for manufacturing a stress-providing structure is applied to the fabrication of a semiconductor device. Firstly, a substrate with a channel structure is provided. A silicon nitride layer is formed over the substrate by chemical vapor deposition in a halogen-containing environment. An etching process is performed to partially remove the silicon nitride layer to expose a portion of a surface of the substrate beside the channel structure. The exposed surface of the substrate is etched to form a recess in the substrate. Then, the substrate is thermally treated at a temperature between 750° C. and 820° C. After the substrate is thermally treated, a stress-providing material is filled in the recess to form a stress-providing structure within the recess. The semiconductor device includes a substrate, a recess and a stress-providing structure. The recess has a round inner surface. The stress-providing structure has a round outer surface.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.