Transistor with boot shaped source/drain regions
US8497180B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 5, 2011 |
| Grant date | Jul 30, 2013 |
| Priority date | — |
| Expiry date | Oct 9, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
Devices are formed with boot shaped source/drain regions formed by isotropic etching followed by anisotropic etching. Embodiments include forming a gate on a substrate, forming a first spacer on each side of the gate, forming a source/drain region in the substrate on each side of the gate, wherein each source/drain region extends under a first spacer, but is separated therefrom by a portion of the substrate, and has a substantially horizontal bottom surface. Embodiments also include forming each source/drain region by forming a cavity to a first depth adjacent the first spacer and forming a second cavity to a second depth below the first cavity and extending laterally underneath the first spacers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.