Corrugated die edge for stacked die semiconductor package
US8502375B2 · kind B2 · utility
1Cited by
6References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2010 |
| Grant date | Aug 6, 2013 |
| Priority date | — |
| Expiry date | Mar 24, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die and semiconductor package formed therefrom, and methods of fabricating the semiconductor die and package, are disclosed. The semiconductor die includes an edge formed with a plurality of corrugations defined by protrusions between recesses. Bond pads may be formed on the protrusions. The semiconductor die formed in this manner may be stacked in the semiconductor package in staggered pairs so that the die bond pads on the protrusions of a lower die are positioned in the recesses of the upper die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.