Cheeman Yu
25Patents
4h-index
35Co-inventors
55Inventor score
Filing activity: Jun 22, 2009 → Feb 25, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8415808B2 | Semiconductor device with die stack arrangement including staggered die and efficient wire bonding | Electricity | 16 | Active |
| US9704797B2 | Waterfall wire bonding | Electricity | 8 | Active |
| US8053276B2 | Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages | Emerging Cross-Sectional Technologies | 6 | Active |
| US9240393B2 | High yield semiconductor device | Electricity | 5 | Active |
| US9773766B2 | Semiconductor device including independent film layer for embedding and/or spacing semiconductor die | Electricity | 4 | Active |
| US9337153B2 | EMI shielding and thermal dissipation for semiconductor device | Electricity | 3 | Active |
| US8053880B2 | Stacked, interconnected semiconductor package | Electricity | 3 | Active |
| US8878368B2 | Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging | Electricity | 2 | Active |
| US10229886B2 | Discrete component backward traceability and semiconductor device forward traceability | Electricity | 2 | Active |
| US8129272B2 | Hidden plating traces | Electricity | 2 | Active |
| US8853863B2 | Semiconductor device with die stack arrangement including staggered die and efficient wire bonding | Electricity | 1 | Active |
| US9230919B2 | Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging | Electricity | 1 | Active |
| US9331045B2 | Semiconductor die laminating device with independent drives | Electricity | 1 | Active |
| US8502375B2 | Corrugated die edge for stacked die semiconductor package | Electricity | 1 | Active |
| US8110439B2 | Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages | Emerging Cross-Sectional Technologies | 1 | Active |
| US8217522B2 | Printed circuit board with coextensive electrical connectors and contact pad areas | Emerging Cross-Sectional Technologies | 0 | Active |
| US8482139B2 | Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards | Electricity | 0 | Active |
| US7939944B2 | Semiconductor die having a redistribution layer | Electricity | 0 | Active |
| US8653653B2 | High density three dimensional semiconductor die package | Electricity | 0 | Active |
| US9362244B2 | Wire tail connector for a semiconductor device | Electricity | 0 | Active |
| US8232145B2 | Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards | Electricity | 0 | Active |
| US9209159B2 | Hidden plating traces | Electricity | 0 | Active |
| US8349655B2 | Method of fabricating a two-sided die in a four-sided leadframe based package | Electricity | 0 | Active |
| US10051733B2 | Printed circuit board with coextensive electrical connectors and contact pad areas | Emerging Cross-Sectional Technologies | 0 | Active |
| US9236368B2 | Semiconductor device including embedded controller die and method of making same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.