Solder bump structure for flip chip semiconductor devices and method of manufacturing therefore
US8507317B2 · kind B2 · utility
2Cited by
32References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2011 |
| Grant date | Aug 13, 2013 |
| Priority date | — |
| Expiry date | Jun 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention provides, in one aspect, a semiconductor device that comprises an interconnect layer located over a semiconductor substrate. A passivation layer is located over the interconnect layer and having a solder bump support opening formed therein. Support pillars that comprise a conductive material are located within the solder bump support opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.