Mark A. Bachman
19Patents
7h-index
16Co-inventors
59Inventor score
Filing activity: Sep 30, 2003 → Jun 3, 2014
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8492911B2 | Stacked interconnect heat sink | Electricity | 26 | Active |
| US8987137B2 | Method of fabrication of through-substrate vias | Electricity | 24 | Active |
| US7952206B2 | Solder bump structure for flip chip semiconductor devices and method of manufacture therefore | Electricity | 14 | Active |
| US7328830B2 | Structure and method for bonding to copper interconnect structures | Electricity | 12 | Expired |
| US8742535B2 | Integration of shallow trench isolation and through-substrate vias into integrated circuit designs | Electricity | 11 | Active |
| US8378485B2 | Solder interconnect by addition of copper | Electricity | 10 | Active |
| US8319343B2 | Routing under bond pad for the replacement of an interconnect layer | Electricity | 9 | Active |
| US7777333B2 | Structure and method for fabricating flip chip devices | Electricity | 7 | Expired |
| US6960836B2 | Reinforced bond pad | Electricity | 6 | Expired |
| US7221173B2 | Method and structures for testing a semiconductor wafer prior to performing a flip chip bumping process | Electricity | 3 | Expired |
| US7671436B2 | Electronic packages | Electricity | 2 | Active |
| US7479695B2 | Low thermal resistance assembly for flip chip applications | Electricity | 2 | Active |
| US8507317B2 | Solder bump structure for flip chip semiconductor devices and method of manufacturing therefore | Electricity | 2 | Active |
| US9613847B2 | Integration of shallow trench isolation and through-substrate vias into integrated circuit designs | Electricity | 2 | Active |
| US8779587B2 | PB-free solder bumps with improved mechanical properties | Electricity | 1 | Active |
| US7724359B2 | Method of making electronic entities | Electricity | 1 | Active |
| US8580621B2 | Solder interconnect by addition of copper | Electricity | 1 | Active |
| US9054064B2 | Stacked interconnect heat sink | Electricity | 0 | Active |
| US9443821B2 | Pb-free solder bumps with improved mechanical properties | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.