Memory module in a package
US8513817B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2012 |
| Grant date | Aug 20, 2013 |
| Priority date | — |
| Expiry date | Jan 9, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19106
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic package can include a substrate having first and second opposed surfaces, first, second, third, and fourth microelectronic elements, and a plurality of terminals exposed at the second surface. Each microelectronic element can have a front surface facing the first surface of the substrate and a plurality of contacts at the front surface. The front surfaces of the microelectronic elements can be arranged in a single plane parallel to the first surface. Each microelectronic element can have a column of contacts exposed at the front surface and arranged along respective first, second, third, and fourth axes. The first and third axes can be parallel to one another. The second and fourth axes can be transverse to the first and third axes. The microelectronic package can also include electrical connections extending from at least some of the contacts of each microelectronic element to at least some of the terminals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.