Regulating atomic memory operations to prevent denial of service attack

US8516577B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Michael S. Bair · Banks, US
• David William Burns · Minneapolis, US
• Robert S. Chappell · Portland, US
• Prakash Math · Hillsboro, US
• Leslie A. Ong · Portland, US
• Pankaj Raghuvanshi · San Jose, US
• Shlomo Raikin · Nes Ziona, IL
• Raanan Sade · Migdal HaEmek, IL
• Michael D. Tucknott · Hillsboro, US
• Igor Yanover · Yoqneam Illit, IL

Key dates

• Filing date: Sep 22, 2010
• Grant date: Aug 20, 2013
• Expiry date: Aug 6, 2031

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F9/526
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

In one embodiment, the present invention includes a method for identifying a termination sequence for an atomic memory operation executed by a first thread, associating a timer with the first thread, and preventing the first thread from execution of a memory cluster operation after completion of the atomic memory operation until a prevention window has passed. This method may be executed by regulation logic associated with a memory execution unit of a processor, in some embodiments. Other embodiments are described and claimed.