Methods of forming copper-based conductive structures on an integrated circuit device
US8517769B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2012 |
| Grant date | Aug 27, 2013 |
| Priority date | — |
| Expiry date | Mar 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are various methods of forming copper-based conductive structures on integrated circuit devices. In one example, the method includes the steps of forming a trench/via in a layer of insulating material, forming a copper-based seed layer above the layer of insulating material and in the trench/via, performing a heating process on the copper-based seed layer to increase an amount of the copper-based seed layer positioned proximate a bottom of the trench/via, performing an etching process on said copper-based seed layer and performing an electroless copper deposition process to fill the trench/via with a copper-based material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.