Method for fabricating a damascene self-aligned ferroelectric random access memory (F-RAM) with simultaneous formation of sidewall ferroelectric capacitors
US8518791B2 · kind B2 · utility
0Cited by
22References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2012 |
| Grant date | Aug 27, 2013 |
| Priority date | — |
| Expiry date | Aug 8, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B53/10
Abstract
Disclosed is a non-volatile, ferroelectric random access memory (F-RAM) device and a method for fabricating the same in the form of a damascene self-aligned F-RAM device comprising a PZT capacitor built on the sidewalls of an oxide trench, while allowing for the simultaneous formation of two ferroelectric sidewall capacitors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.