Thomas E. Davenport
16Patents
6h-index
14Co-inventors
63Inventor score
Filing activity: Dec 12, 1991 → Jun 10, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5206788A | Series ferroelectric capacitor structure for monolithic integrated circuits and method | Emerging Cross-Sectional Technologies | 88 | Expired |
| US5519566A | Method of manufacturing ferroelectric bismuth layered oxides | Chemistry; Metallurgy | 53 | Expired |
| US5426075A | Method of manufacturing ferroelectric bismuth layered oxides | Chemistry; Metallurgy | 47 | Expired |
| US9514797B1 | Hybrid reference generation for ferroelectric random access memory | Electricity | 19 | Active |
| US6853535B2 | Method for producing crystallographically textured electrodes for textured PZT capacitors | Electricity | 8 | Expired |
| US8916434B2 | Enhanced hydrogen barrier encapsulation method for the control of hydrogen induced degradation of ferroelectric capacitors in an F-RAM process | Electricity | 6 | Active |
| US8518792B2 | Method for fabricating a damascene self-aligned ferroelectric random access memory (F-RAM) having a ferroelectric capacitor aligned with a three dimensional transistor structure | Electricity | 5 | Active |
| US8552515B2 | Method for fabricating a damascene self-aligned ferroelectric random access memory (F-RAM) device structure employing reduced processing steps | Electricity | 5 | Active |
| US9624094B1 | Hydrogen barriers in a copper interconnect process | Electricity | 1 | Active |
| US9318693B2 | Method for fabricating a damascene self-aligned ferroelectric random access memory (F-RAM) having a ferroelectric capacitor aligned with a three dimensional transistor structure | Electricity | 1 | Active |
| US9548348B2 | Methods of fabricating an F-RAM | Electricity | 1 | Active |
| US8842460B2 | Method for improving data retention in a 2T/2C ferroelectric memory | Physics | 0 | Active |
| US9240440B1 | Method minimizing imprint through packaging of F-RAM | Electricity | 0 | Active |
| US8518791B2 | Method for fabricating a damascene self-aligned ferroelectric random access memory (F-RAM) with simultaneous formation of sidewall ferroelectric capacitors | Electricity | 0 | Active |
| US8728901B2 | Method for fabricating a damascene self-aligned ferroelectric random access memory (F-RAM) with simultaneous formation of sidewall ferroelectric capacitors | Electricity | 0 | Active |
| US9006808B2 | Eliminating shorting between ferroelectric capacitors and metal contacts during ferroelectric random access memory fabrication | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.