Through silicon via and method of forming the same
US8518823B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2011 |
| Grant date | Aug 27, 2013 |
| Priority date | — |
| Expiry date | Dec 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1461
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a through silicon via (TSV). The TSV is disposed in a substrate including a via opening penetrating through a first surface and a second surface of the substrate. The TSV includes an insulation layer, a barrier layer, a buffer layer and a conductive electrode. The insulation layer is disposed on the surface of the via opening. The barrier layer is disposed on the surface of the insulation layer. The conductive electrode is disposed on the surface of the buffer layer and fills the via opening. The buffer layer further covers a surface of the conductive electrode at the side of the second surface. The present invention further discloses a method of forming the TSV.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.